diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2014-08-20 09:55:42 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-08-20 09:55:42 +0100 |
| commit | 2656eb7c599e306b95bad82b1372fc49ba3088f6 (patch) | |
| tree | 571f2ba5ef8acf61eec2fdec5b9b7545b6ece0df /hw/arm/boot.c | |
| parent | 302fa283789a2f9b1199c327047cfad2258a23a2 (diff) | |
| parent | 14a906f755f77b325666d67e071c572478d06067 (diff) | |
| download | focaccia-qemu-2656eb7c599e306b95bad82b1372fc49ba3088f6.tar.gz focaccia-qemu-2656eb7c599e306b95bad82b1372fc49ba3088f6.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140819' into staging
target-arm: * fix preferred return address for A64 BRK insn * implement AArch64 single-stepping * support loading gzip compressed AArch64 kernels * use correct PSCI function IDs in the DT when KVM uses PSCI 0.2 * minor cleanups # gpg: Signature made Tue 19 Aug 2014 19:04:09 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20140819: arm: stellaris: Remove misleading address_space_mem var arm: armv7m: Rename address_space_mem -> system_memory aarch64: Allow -kernel option to take a gzip-compressed kernel. loader: Add load_image_gzipped function. arm: cortex-a9: Fix cache-line size and associativity arm/virt: Use PSCI v0.2 function IDs in the DT when KVM uses PSCI v0.2 target-arm: Rename QEMU PSCI v0.1 definitions target-arm: Implement MDSCR_EL1 as having state target-arm: Implement ARMv8 single-stepping for AArch32 code target-arm: Implement ARMv8 single-step handling for A64 code target-arm: A64: Avoid duplicate exit_tb(0) in non-linked goto_tb target-arm: Set PSTATE.SS correctly on exception return from AArch64 target-arm: Correctly handle PSTATE.SS when taking exception to AArch32 target-arm: Don't allow AArch32 to access RES0 CPSR bits target-arm: Adjust debug ID registers per-CPU target-arm: Provide both 32 and 64 bit versions of debug registers target-arm: Allow STATE_BOTH reginfo descriptions for more than cp14 target-arm: Collect up the debug cp register definitions target-arm: Fix return address for A64 BRK instructions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/boot.c')
| -rw-r--r-- | hw/arm/boot.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 12417617a3..e32f2f4158 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -514,6 +514,13 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info) kernel_size = load_uimage(info->kernel_filename, &entry, NULL, &is_linux); } + /* On aarch64, it's the bootloader's job to uncompress the kernel. */ + if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && kernel_size < 0) { + entry = info->loader_start + kernel_load_offset; + kernel_size = load_image_gzipped(info->kernel_filename, entry, + info->ram_size - kernel_load_offset); + is_linux = 1; + } if (kernel_size < 0) { entry = info->loader_start + kernel_load_offset; kernel_size = load_image_targphys(info->kernel_filename, entry, |