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| author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2018-09-25 14:02:30 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-09-25 14:14:07 +0100 |
| commit | 5561adf062c97a9c39ff037592b83d9b118f036a (patch) | |
| tree | 4db6a5eae3168ea3b868a52eead301c5383bfb23 /hw/arm/exynos4210.c | |
| parent | e79b445d896deb61909be52b61b87c98a9ed96f7 (diff) | |
| download | focaccia-qemu-5561adf062c97a9c39ff037592b83d9b118f036a.tar.gz focaccia-qemu-5561adf062c97a9c39ff037592b83d9b118f036a.zip | |
hw/arm/exynos4210: fix Exynos4210 UART support
commit 97274d0c05d4 ("hw/char/exynos4210_uart.c: Remove unneeded
handling of NULL chardev") broke Exynos4210 support as it removed
NULL 'Chardev *chr' handling from exynos4210_uart_create() and
currently exynos4210_init() always passes NULL as 'Chardev *chr'
argument to exynos4210_uart_create() calls. Fix it by adding
missing serial_hd() calls to exynos4210_init().
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 9310418.Wg32kryeWE@amdc3058
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/exynos4210.c')
| -rw-r--r-- | hw/arm/exynos4210.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index b7463a71ec..827318a003 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -352,19 +352,19 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) /*** UARTs ***/ exynos4210_uart_create(EXYNOS4210_UART0_BASE_ADDR, - EXYNOS4210_UART0_FIFO_SIZE, 0, NULL, + EXYNOS4210_UART0_FIFO_SIZE, 0, serial_hd(0), s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 0)]); exynos4210_uart_create(EXYNOS4210_UART1_BASE_ADDR, - EXYNOS4210_UART1_FIFO_SIZE, 1, NULL, + EXYNOS4210_UART1_FIFO_SIZE, 1, serial_hd(1), s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 1)]); exynos4210_uart_create(EXYNOS4210_UART2_BASE_ADDR, - EXYNOS4210_UART2_FIFO_SIZE, 2, NULL, + EXYNOS4210_UART2_FIFO_SIZE, 2, serial_hd(2), s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 2)]); exynos4210_uart_create(EXYNOS4210_UART3_BASE_ADDR, - EXYNOS4210_UART3_FIFO_SIZE, 3, NULL, + EXYNOS4210_UART3_FIFO_SIZE, 3, serial_hd(3), s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 3)]); /*** SD/MMC host controllers ***/ |