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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-10-22 17:50:39 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-10-22 17:50:39 +0100 |
| commit | ec97eb6133e204c8c0ee492cfc9c7551b6297aca (patch) | |
| tree | bbfe136326369ca04d62632f2d7148118a9e39c5 /hw/arm/omap2.c | |
| parent | f9bec781379dd7ccf9d01b4b6a79a9ec82c192e5 (diff) | |
| parent | 90600829b3355b8d27b791b893095c18f529aec3 (diff) | |
| download | focaccia-qemu-ec97eb6133e204c8c0ee492cfc9c7551b6297aca.tar.gz focaccia-qemu-ec97eb6133e204c8c0ee492cfc9c7551b6297aca.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191022-2' into staging
* Fix sign-extension for SMLAL* instructions * Various ptimer device conversions to new transaction API * Add a dummy Samsung SDHCI controller model to exynos4 boards * Minor refactorings of RAM creation for some arm boards # gpg: Signature made Tue 22 Oct 2019 17:44:26 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20191022-2: hw/arm/digic4: Inline digic4_board_setup_ram() function hw/arm/omap1: Create the RAM in the board hw/arm/omap2: Create the RAM in the board hw/arm/collie: Create the RAM in the board hw/arm/mps2: Use the IEC binary prefix definitions hw/arm/xilinx_zynq: Use the IEC binary prefix definitions hw/arm/exynos4210: Use the Samsung s3c SDHCI controller hw/sd/sdhci: Add dummy Samsung SDHCI controller hw/sd/sdhci: Add a comment to distinct the i.MX eSDHC functions hw/m68k/mcf5208.c: Switch to transaction-based ptimer API hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer API hw/timer/altera_timer.c: Switch to transaction-based ptimer API hw/timer/lm32_timer: Switch to transaction-based ptimer API hw/timer/sh_timer: Switch to transaction-based ptimer API hw/timer/puv3_ost.c: Switch to transaction-based ptimer API hw/timer/arm_mptimer.c: Undo accidental rename of arm_mptimer_init() hw/timer/exynos4210_mct: Initialize ptimer before starting it target/arm: Fix sign-extension for SMLAL* Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/omap2.c')
| -rw-r--r-- | hw/arm/omap2.c | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index bd7ddff983..457f152bac 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -22,6 +22,7 @@ #include "qemu/error-report.h" #include "qapi/error.h" #include "cpu.h" +#include "exec/address-spaces.h" #include "sysemu/blockdev.h" #include "sysemu/qtest.h" #include "sysemu/reset.h" @@ -2276,8 +2277,7 @@ static const struct dma_irq_map omap2_dma_irq_map[] = { { 0, OMAP_INT_24XX_SDMA_IRQ3 }, }; -struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem, - unsigned long sdram_size, +struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, const char *cpu_type) { struct omap_mpu_state_s *s = g_new0(struct omap_mpu_state_s, 1); @@ -2286,11 +2286,11 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem, int i; SysBusDevice *busdev; struct omap_target_agent_s *ta; + MemoryRegion *sysmem = get_system_memory(); /* Core */ s->mpu_model = omap2420; s->cpu = ARM_CPU(cpu_create(cpu_type)); - s->sdram_size = sdram_size; s->sram_size = OMAP242X_SRAM_SIZE; s->wakeup = qemu_allocate_irq(omap_mpu_wakeup, s, 0); @@ -2299,9 +2299,6 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem, omap_clk_init(s); /* Memory-mapped stuff */ - memory_region_allocate_system_memory(&s->sdram, NULL, "omap2.dram", - s->sdram_size); - memory_region_add_subregion(sysmem, OMAP2_Q2_BASE, &s->sdram); memory_region_init_ram(&s->sram, NULL, "omap2.sram", s->sram_size, &error_fatal); memory_region_add_subregion(sysmem, OMAP2_SRAM_BASE, &s->sram); @@ -2338,8 +2335,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem, s->port->addr_valid = omap2_validate_addr; /* Register SDRAM and SRAM ports for fast DMA transfers. */ - soc_dma_port_add_mem(s->dma, memory_region_get_ram_ptr(&s->sdram), - OMAP2_Q2_BASE, s->sdram_size); + soc_dma_port_add_mem(s->dma, memory_region_get_ram_ptr(sdram), + OMAP2_Q2_BASE, memory_region_size(sdram)); soc_dma_port_add_mem(s->dma, memory_region_get_ram_ptr(&s->sram), OMAP2_SRAM_BASE, s->sram_size); |