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| author | Anthony Liguori <anthony@codemonkey.ws> | 2013-08-20 11:23:52 -0500 |
|---|---|---|
| committer | Anthony Liguori <anthony@codemonkey.ws> | 2013-08-20 11:23:52 -0500 |
| commit | ecfe10c9a6f9bc77d0e4b7eb5d0f5d61e8fbaed8 (patch) | |
| tree | 7b591e576ef4fd8580bf9fc05163c5e1a2d580aa /hw/arm/omap2.c | |
| parent | 9176e8fb8f78206bd4039f001aca0d931a47d663 (diff) | |
| parent | 230058106ab26de9b876158dbe27d60719f01f51 (diff) | |
| download | focaccia-qemu-ecfe10c9a6f9bc77d0e4b7eb5d0f5d61e8fbaed8.tar.gz focaccia-qemu-ecfe10c9a6f9bc77d0e4b7eb5d0f5d61e8fbaed8.zip | |
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20130820' into staging
target-arm queue # gpg: Signature made Tue 20 Aug 2013 08:56:28 AM CDT using RSA key ID 14360CDE # gpg: Can't check signature: public key not found # By Peter Maydell (20) and Peter Chubb (1) # Via Peter Maydell * pmaydell/tags/pull-target-arm-20130820: (21 commits) hw/timer/imx_epit: Simplify and fix imx_epit implementation default-configs: Fix A9MP and A15MP config names hw/cpu/a15mpcore: Wire generic timer outputs to GIC inputs target-arm: Implement the generic timer target-arm: Support coprocessor registers which do I/O target-arm: Allow raw_read() and raw_write() to handle 64 bit regs hw/arm/pic_cpu: Remove the now-unneeded arm_pic_init_cpu() hw/arm/xilinx_zynq: Don't use arm_pic_init_cpu() hw/arm/vexpress: Don't use arm_pic_init_cpu() hw/arm/versatilepb: Don't use arm_pic_init_cpu() hw/arm/strongarm: Don't use arm_pic_init_cpu() hw/arm/realview: Don't use arm_pic_init_cpu() hw/arm/omap*: Don't use arm_pic_init_cpu() hw/arm/musicpal: Don't use arm_pic_init_cpu() hw/arm/kzm: Don't use arm_pic_init_cpu() hw/arm/integratorcp: Don't use arm_pic_init_cpu() hw/arm/highbank: Don't use arm_pic_init_cpu() hw/arm/exynos4210: Don't use arm_pic_init_cpu() hw/arm/armv7m: Don't use arm_pic_init_cpu() target-arm: Make IRQ and FIQ gpio lines on the CPU object ... Message-id: 1377007680-4934-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
Diffstat (limited to 'hw/arm/omap2.c')
| -rw-r--r-- | hw/arm/omap2.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index ec9610b7d5..36efde0d64 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2244,7 +2244,6 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem, { struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) g_malloc0(sizeof(struct omap_mpu_state_s)); - qemu_irq *cpu_irq; qemu_irq dma_irqs[4]; DriveInfo *dinfo; int i; @@ -2277,15 +2276,16 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem, s->l4 = omap_l4_init(sysmem, OMAP2_L4_BASE, 54); /* Actually mapped at any 2K boundary in the ARM11 private-peripheral if */ - cpu_irq = arm_pic_init_cpu(s->cpu); s->ih[0] = qdev_create(NULL, "omap2-intc"); qdev_prop_set_uint8(s->ih[0], "revision", 0x21); qdev_prop_set_ptr(s->ih[0], "fclk", omap_findclk(s, "mpu_intc_fclk")); qdev_prop_set_ptr(s->ih[0], "iclk", omap_findclk(s, "mpu_intc_iclk")); qdev_init_nofail(s->ih[0]); busdev = SYS_BUS_DEVICE(s->ih[0]); - sysbus_connect_irq(busdev, 0, cpu_irq[ARM_PIC_CPU_IRQ]); - sysbus_connect_irq(busdev, 1, cpu_irq[ARM_PIC_CPU_FIQ]); + sysbus_connect_irq(busdev, 0, + qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ)); + sysbus_connect_irq(busdev, 1, + qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ)); sysbus_mmio_map(busdev, 0, 0x480fe000); s->prcm = omap_prcm_init(omap_l4tao(s->l4, 3), qdev_get_gpio_in(s->ih[0], |