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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-09-20 17:35:36 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-09-20 17:35:36 +0100 |
| commit | d3f5433c7b4aa2d59c6de4175743f4126e181aea (patch) | |
| tree | 4f800d0b63205194e3049a23b378783e21b96d8a /hw/arm/pxa2xx.c | |
| parent | c51700273ad9802a21c19f8d2b4bcb67c38e74ac (diff) | |
| parent | e3d038b89f1bf3f09da4d59aa16b16e8305e1a05 (diff) | |
| download | focaccia-qemu-d3f5433c7b4aa2d59c6de4175743f4126e181aea.tar.gz focaccia-qemu-d3f5433c7b4aa2d59c6de4175743f4126e181aea.zip | |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
Machine/CPU/NUMA queue, 2017-09-19 # gpg: Signature made Tue 19 Sep 2017 21:17:01 BST # gpg: using RSA key 0x2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: MAINTAINERS: Update git URLs for my trees hw/acpi-build: Fix SRAT memory building in case of node 0 without RAM NUMA: Replace MAX_NODES with nb_numa_nodes in for loop numa: cpu: calculate/set default node-ids after all -numa CLI options are parsed arm: drop intermediate cpu_model -> cpu type parsing and use cpu type directly pc: use generic cpu_model parsing vl.c: convert cpu_model to cpu type and set of global properties before machine_init() cpu: make cpu_generic_init() abort QEMU on error qom: cpus: split cpu_generic_init() on feature parsing and cpu creation parts hostmem-file: Add "discard-data" option osdep: Define QEMU_MADV_REMOVE vl: Clean up user-creatable objects when exiting Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/pxa2xx.c')
| -rw-r--r-- | hw/arm/pxa2xx.c | 18 |
1 files changed, 4 insertions, 14 deletions
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index b0ac3cfd64..cf07234578 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -2052,25 +2052,19 @@ static void pxa2xx_reset(void *opaque, int line, int level) /* Initialise a PXA270 integrated chip (ARM based core). */ PXA2xxState *pxa270_init(MemoryRegion *address_space, - unsigned int sdram_size, const char *revision) + unsigned int sdram_size, const char *cpu_type) { PXA2xxState *s; int i; DriveInfo *dinfo; s = g_new0(PXA2xxState, 1); - if (revision && strncmp(revision, "pxa27", 5)) { + if (strncmp(cpu_type, "pxa27", 5)) { fprintf(stderr, "Machine requires a PXA27x processor.\n"); exit(1); } - if (!revision) - revision = "pxa270"; - s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, revision)); - if (s->cpu == NULL) { - fprintf(stderr, "Unable to find CPU definition\n"); - exit(1); - } + s->cpu = ARM_CPU(cpu_create(cpu_type)); s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0); /* SDRAM & Internal Memory Storage */ @@ -2196,11 +2190,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size) s = g_new0(PXA2xxState, 1); - s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, "pxa255")); - if (s->cpu == NULL) { - fprintf(stderr, "Unable to find CPU definition\n"); - exit(1); - } + s->cpu = ARM_CPU(cpu_create(ARM_CPU_TYPE_NAME("pxa255"))); s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0); /* SDRAM & Internal Memory Storage */ |