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authorJean-Philippe Brucker <jean-philippe@linaro.org>2023-02-14 17:19:21 +0000
committerPeter Maydell <peter.maydell@linaro.org>2023-02-16 16:00:48 +0000
commitca3fbed896ec867ea0826b9859c6636ca927e835 (patch)
tree6210a33982b77d4c54a9b9fc6e20d43f6c9b0843 /hw/arm/smmu-common.c
parent4d120d7d6084ef388a9016d7dbf091c4d5e055fc (diff)
downloadfocaccia-qemu-ca3fbed896ec867ea0826b9859c6636ca927e835.tar.gz
focaccia-qemu-ca3fbed896ec867ea0826b9859c6636ca927e835.zip
hw/arm/smmu-common: Support 64-bit addresses
Addresses targeting the second translation table (TTB1) in the SMMU have
all upper bits set. Ensure the IOMMU region covers all 64 bits.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20230214171921.1917916-2-jean-philippe@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/smmu-common.c')
-rw-r--r--hw/arm/smmu-common.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
index 733c964778..2b8c67b9a1 100644
--- a/hw/arm/smmu-common.c
+++ b/hw/arm/smmu-common.c
@@ -439,7 +439,7 @@ static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn)
 
         memory_region_init_iommu(&sdev->iommu, sizeof(sdev->iommu),
                                  s->mrtypename,
-                                 OBJECT(s), name, 1ULL << SMMU_MAX_VA_BITS);
+                                 OBJECT(s), name, UINT64_MAX);
         address_space_init(&sdev->as,
                            MEMORY_REGION(&sdev->iommu), name);
         trace_smmu_add_mr(name);