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| author | Eric Auger <eric.auger@redhat.com> | 2018-05-04 18:05:51 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-05-04 18:49:48 +0100 |
| commit | fae4be38b35dcfae48494c023454e8988c15b69a (patch) | |
| tree | 07e918d8867bb2ac51335c79ad563fc5a875f0c6 /hw/arm/smmuv3-internal.h | |
| parent | dadd1a0809b1aff8c4d5364f3714b3e0e039dcb0 (diff) | |
| download | focaccia-qemu-fae4be38b35dcfae48494c023454e8988c15b69a.tar.gz focaccia-qemu-fae4be38b35dcfae48494c023454e8988c15b69a.zip | |
hw/arm/smmuv3: Implement MMIO write operations
Now we have relevant helpers for queue and irq management, let's implement MMIO write operations. Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Prem Mallappa <prem.mallappa@broadcom.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1524665762-31355-8-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/smmuv3-internal.h')
| -rw-r--r-- | hw/arm/smmuv3-internal.h | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index 223d8406ed..282285d310 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -61,6 +61,8 @@ REG32(CR0, 0x20) FIELD(CR0, EVENTQEN, 2, 1) FIELD(CR0, CMDQEN, 3, 1) +#define SMMU_CR0_RESERVED 0xFFFFFC20 + REG32(CR0ACK, 0x24) REG32(CR1, 0x28) REG32(CR2, 0x2c) @@ -149,10 +151,6 @@ static inline bool smmuv3_gerror_irq_enabled(SMMUv3State *s) return FIELD_EX32(s->irq_ctrl, IRQ_CTRL, GERROR_IRQEN); } -/* public until callers get introduced */ -void smmuv3_trigger_irq(SMMUv3State *s, SMMUIrq irq, uint32_t gerror_mask); -void smmuv3_write_gerrorn(SMMUv3State *s, uint32_t gerrorn); - /* Queue Handling */ #define Q_BASE(q) ((q)->base & SMMU_BASE_ADDR_MASK) @@ -314,6 +312,6 @@ enum { /* Command completion notification */ addr; \ }) -int smmuv3_cmdq_consume(SMMUv3State *s); +#define SMMU_FEATURE_2LVL_STE (1 << 0) #endif |