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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-09-11 19:26:51 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-09-11 19:26:51 +0100 |
| commit | f4ef8c9cc10b3bee829b9775879d4ff9f77c2442 (patch) | |
| tree | 8245341c3ebfe98b9673bf7a8cb818b6d494c76f /hw/arm/strongarm.c | |
| parent | 2499453eb1cbb68a45d7562a180afd7659007fd4 (diff) | |
| parent | b84bf23c88699098973de3bdec316c796f1b3794 (diff) | |
| download | focaccia-qemu-f4ef8c9cc10b3bee829b9775879d4ff9f77c2442.tar.gz focaccia-qemu-f4ef8c9cc10b3bee829b9775879d4ff9f77c2442.zip | |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM boilerplate cleanup Documentation build fix: * memory: Remove kernel-doc comment marker (Eduardo Habkost) QOM cleanups: * Rename QOM macros for consistency between TYPE_* and type checking constants (Eduardo Habkost) QOM new macros: * OBJECT_DECLARE_* and OBJECT_DEFINE_* macros (Daniel P. Berrangé) * DECLARE_*_CHECKER macros (Eduardo Habkost) Automated QOM boilerplate changes: * Automated changes to use DECLARE_*_CHECKER (Eduardo Habkost * Automated changes to use OBJECT_DECLARE* (Eduardo Habkost) # gpg: Signature made Thu 10 Sep 2020 19:17:49 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: (33 commits) virtio-vga: Use typedef name for instance_size vhost-user-vga: Use typedef name for instance_size xilinx_axienet: Use typedef name for instance_size lpc_ich9: Use typedef name for instance_size omap_intc: Use typedef name for instance_size xilinx_axidma: Use typedef name for instance_size tusb6010: Rename TUSB to TUSB6010 pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312 vfio: Rename PCI_VFIO to VFIO_PCI usb: Rename USB_SERIAL_DEV to USB_SERIAL sabre: Rename SABRE_DEVICE to SABRE rs6000_mc: Rename RS6000MC_DEVICE to RS6000MC filter-rewriter: Rename FILTER_COLO_REWRITER to FILTER_REWRITER esp: Rename ESP_STATE to ESP ahci: Rename ICH_AHCI to ICH9_AHCI vmgenid: Rename VMGENID_DEVICE to TYPE_VMGENID vfio: Rename VFIO_AP_DEVICE_TYPE to TYPE_VFIO_AP_DEVICE dev-smartcard-reader: Rename CCID_DEV_NAME to TYPE_USB_CCID_DEV ap-device: Rename AP_DEVICE_TYPE to TYPE_AP_DEVICE gpex: Fix type checking function name ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/strongarm.c')
| -rw-r--r-- | hw/arm/strongarm.c | 49 |
1 files changed, 27 insertions, 22 deletions
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 2639b9ae55..0fe829b868 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -45,6 +45,7 @@ #include "qapi/error.h" #include "qemu/cutils.h" #include "qemu/log.h" +#include "qom/object.h" //#define DEBUG @@ -84,10 +85,11 @@ static struct { /* Interrupt Controller */ #define TYPE_STRONGARM_PIC "strongarm_pic" -#define STRONGARM_PIC(obj) \ - OBJECT_CHECK(StrongARMPICState, (obj), TYPE_STRONGARM_PIC) +typedef struct StrongARMPICState StrongARMPICState; +DECLARE_INSTANCE_CHECKER(StrongARMPICState, STRONGARM_PIC, + TYPE_STRONGARM_PIC) -typedef struct StrongARMPICState { +struct StrongARMPICState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -98,7 +100,7 @@ typedef struct StrongARMPICState { uint32_t enabled; uint32_t is_fiq; uint32_t int_idle; -} StrongARMPICState; +}; #define ICIP 0x00 #define ICMR 0x04 @@ -252,10 +254,11 @@ static const TypeInfo strongarm_pic_info = { * f = 32 768 / (RTTR_trim + 1) */ #define TYPE_STRONGARM_RTC "strongarm-rtc" -#define STRONGARM_RTC(obj) \ - OBJECT_CHECK(StrongARMRTCState, (obj), TYPE_STRONGARM_RTC) +typedef struct StrongARMRTCState StrongARMRTCState; +DECLARE_INSTANCE_CHECKER(StrongARMRTCState, STRONGARM_RTC, + TYPE_STRONGARM_RTC) -typedef struct StrongARMRTCState { +struct StrongARMRTCState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -268,7 +271,7 @@ typedef struct StrongARMRTCState { QEMUTimer *rtc_hz; qemu_irq rtc_irq; qemu_irq rtc_hz_irq; -} StrongARMRTCState; +}; static inline void strongarm_rtc_int_update(StrongARMRTCState *s) { @@ -478,10 +481,10 @@ static const TypeInfo strongarm_rtc_sysbus_info = { #define GAFR 0x1c #define TYPE_STRONGARM_GPIO "strongarm-gpio" -#define STRONGARM_GPIO(obj) \ - OBJECT_CHECK(StrongARMGPIOInfo, (obj), TYPE_STRONGARM_GPIO) - typedef struct StrongARMGPIOInfo StrongARMGPIOInfo; +DECLARE_INSTANCE_CHECKER(StrongARMGPIOInfo, STRONGARM_GPIO, + TYPE_STRONGARM_GPIO) + struct StrongARMGPIOInfo { SysBusDevice busdev; MemoryRegion iomem; @@ -717,10 +720,10 @@ static const TypeInfo strongarm_gpio_info = { #define PPFR 0x10 #define TYPE_STRONGARM_PPC "strongarm-ppc" -#define STRONGARM_PPC(obj) \ - OBJECT_CHECK(StrongARMPPCInfo, (obj), TYPE_STRONGARM_PPC) - typedef struct StrongARMPPCInfo StrongARMPPCInfo; +DECLARE_INSTANCE_CHECKER(StrongARMPPCInfo, STRONGARM_PPC, + TYPE_STRONGARM_PPC) + struct StrongARMPPCInfo { SysBusDevice parent_obj; @@ -918,10 +921,11 @@ static const TypeInfo strongarm_ppc_info = { #define RX_FIFO_ROR (1 << 10) #define TYPE_STRONGARM_UART "strongarm-uart" -#define STRONGARM_UART(obj) \ - OBJECT_CHECK(StrongARMUARTState, (obj), TYPE_STRONGARM_UART) +typedef struct StrongARMUARTState StrongARMUARTState; +DECLARE_INSTANCE_CHECKER(StrongARMUARTState, STRONGARM_UART, + TYPE_STRONGARM_UART) -typedef struct StrongARMUARTState { +struct StrongARMUARTState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -945,7 +949,7 @@ typedef struct StrongARMUARTState { bool wait_break_end; QEMUTimer *rx_timeout_timer; QEMUTimer *tx_timer; -} StrongARMUARTState; +}; static void strongarm_uart_update_status(StrongARMUARTState *s) { @@ -1349,10 +1353,11 @@ static const TypeInfo strongarm_uart_info = { /* Synchronous Serial Ports */ #define TYPE_STRONGARM_SSP "strongarm-ssp" -#define STRONGARM_SSP(obj) \ - OBJECT_CHECK(StrongARMSSPState, (obj), TYPE_STRONGARM_SSP) +typedef struct StrongARMSSPState StrongARMSSPState; +DECLARE_INSTANCE_CHECKER(StrongARMSSPState, STRONGARM_SSP, + TYPE_STRONGARM_SSP) -typedef struct StrongARMSSPState { +struct StrongARMSSPState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -1365,7 +1370,7 @@ typedef struct StrongARMSSPState { uint16_t rx_fifo[8]; uint8_t rx_level; uint8_t rx_start; -} StrongARMSSPState; +}; #define SSCR0 0x60 /* SSP Control register 0 */ #define SSCR1 0x64 /* SSP Control register 1 */ |