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| author | Eric Auger <eric.auger@redhat.com> | 2019-03-15 11:12:28 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-03-15 11:12:28 +0000 |
| commit | 41c4fb94aa8a6a16bd107687cd3b5204c68a4042 (patch) | |
| tree | 31ea1bbdf090ebe1cdbcbbd034e612f01af165cf /hw/arm/virt-acpi-build.c | |
| parent | 67d80321f26d9ea2b623ffac567a2f758ceae037 (diff) | |
| download | focaccia-qemu-41c4fb94aa8a6a16bd107687cd3b5204c68a4042.tar.gz focaccia-qemu-41c4fb94aa8a6a16bd107687cd3b5204c68a4042.zip | |
hw/arm/virt-acpi-build: Fix SMMUv3 GSIV values
The GSIV numbers of the SPI based interrupts is not correct as ARM_SPI_BASE was not added to the irqmap[VIRT_SMMU] value. So this may collide with VIRTIO_MMIO irq window. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 20190312091031.5185-1-eric.auger@redhat.com Reviewed-by: Shannon Zhao <shannon.zhaosl@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/virt-acpi-build.c')
| -rw-r--r-- | hw/arm/virt-acpi-build.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index d7e2e4885b..aa02d8d74e 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -405,7 +405,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) its->identifiers[0] = 0; /* MADT translation_id */ if (vms->iommu == VIRT_IOMMU_SMMUV3) { - int irq = vms->irqmap[VIRT_SMMU]; + int irq = vms->irqmap[VIRT_SMMU] + ARM_SPI_BASE; /* SMMUv3 node */ smmu_offset = iort_node_offset + node_size; |