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authorPeter Maydell <peter.maydell@linaro.org>2017-01-20 11:15:09 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-01-20 11:15:09 +0000
commit5454006a7cc6caf10c1816e6828b75a40fbcc16e (patch)
treef949eacfd3e98d6b55211069d1b079b4ca52543b /hw/arm/virt.c
parentaa1b3111b3f3c53b9290ecade02f31acfc579c16 (diff)
downloadfocaccia-qemu-5454006a7cc6caf10c1816e6828b75a40fbcc16e.tar.gz
focaccia-qemu-5454006a7cc6caf10c1816e6828b75a40fbcc16e.zip
hw/arm/virt: Wire VIRQ, VFIQ, maintenance irq lines from GIC to CPU
Wire the new VIRQ, VFIQ and maintenance interrupt lines from the
GIC to each CPU.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1483977924-14522-5-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm/virt.c')
-rw-r--r--hw/arm/virt.c14
1 files changed, 11 insertions, 3 deletions
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 95ac585e19..d931d17fc3 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -546,9 +546,9 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic)
         sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_CPU].base);
     }
 
-    /* Wire the outputs from each CPU's generic timer to the
-     * appropriate GIC PPI inputs, and the GIC's IRQ output to
-     * the CPU's IRQ input.
+    /* Wire the outputs from each CPU's generic timer and the GICv3
+     * maintenance interrupt signal to the appropriate GIC PPI inputs,
+     * and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inputs.
      */
     for (i = 0; i < smp_cpus; i++) {
         DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
@@ -570,9 +570,17 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic)
                                                    ppibase + timer_irq[irq]));
         }
 
+        qdev_connect_gpio_out_named(cpudev, "gicv3-maintenance-interrupt", 0,
+                                    qdev_get_gpio_in(gicdev, ppibase
+                                                     + ARCH_GICV3_MAINT_IRQ));
+
         sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
         sysbus_connect_irq(gicbusdev, i + smp_cpus,
                            qdev_get_gpio_in(cpudev, ARM_CPU_FIQ));
+        sysbus_connect_irq(gicbusdev, i + 2 * smp_cpus,
+                           qdev_get_gpio_in(cpudev, ARM_CPU_VIRQ));
+        sysbus_connect_irq(gicbusdev, i + 3 * smp_cpus,
+                           qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ));
     }
 
     for (i = 0; i < NUM_IRQS; i++) {