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authorPeter Maydell <peter.maydell@linaro.org>2023-07-04 14:06:47 +0100
committerPeter Maydell <peter.maydell@linaro.org>2023-07-06 13:30:10 +0100
commitc74138c6c040b62e941326a4fbb25a93fdd35b72 (patch)
treecd30400ed5dbcbcee7e441827807ede69fd0133b /hw/arm/virt.c
parent7d8c283e10dd818457e7c6a0f729fb03857253ac (diff)
downloadfocaccia-qemu-c74138c6c040b62e941326a4fbb25a93fdd35b72.tar.gz
focaccia-qemu-c74138c6c040b62e941326a4fbb25a93fdd35b72.zip
target/arm: Define neoverse-v1
Now that we have implemented support for FEAT_LSE2, we can define
a CPU model for the Neoverse-V1, and enable it for the virt and
sbsa-ref boards.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230704130647.2842917-3-peter.maydell@linaro.org
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/arm/virt.c')
-rw-r--r--hw/arm/virt.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 3196db556e..796181e169 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -214,6 +214,7 @@ static const char *valid_cpus[] = {
     ARM_CPU_TYPE_NAME("cortex-a76"),
     ARM_CPU_TYPE_NAME("a64fx"),
     ARM_CPU_TYPE_NAME("neoverse-n1"),
+    ARM_CPU_TYPE_NAME("neoverse-v1"),
 #endif
     ARM_CPU_TYPE_NAME("cortex-a53"),
     ARM_CPU_TYPE_NAME("cortex-a57"),