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| author | Anthony Liguori <aliguori@us.ibm.com> | 2013-06-03 13:24:25 -0500 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-06-03 13:24:25 -0500 |
| commit | 0ded1fe5f36765b97b15a7afebb6d04ddcc4771c (patch) | |
| tree | 5bed5d3f9ac15091b101cbc8223d548490eabbcb /hw/arm/xilinx_zynq.c | |
| parent | 8b779b368b3b45d5ed3160173499eeafee4d567c (diff) | |
| parent | 95669e69848eda87861e1ec3016562101542f543 (diff) | |
| download | focaccia-qemu-0ded1fe5f36765b97b15a7afebb6d04ddcc4771c.tar.gz focaccia-qemu-0ded1fe5f36765b97b15a7afebb6d04ddcc4771c.zip | |
Merge remote-tracking branch 'pmaydell/arm-devs.next' into staging
# By Peter Crosthwaite (20) and others # Via Peter Maydell * pmaydell/arm-devs.next: (24 commits) i.MX: Improve EPIT timer code. exynos4210.c: register rom_mem for memory migration hw/arm/exynos4210.c: convert chipid_and_omr to an mmio region i.MX: split GPT and EPIT timer implementation sd/sd.c: Fix "inquiry" ACMD41 sd/sdhci:ADMA: fix interrupt sd/sdhci.c: Fix bdata_read DPRINT message sd/sdhci: Fix Buffer Write Ready interrupt sd/sdhci.c: Only reset data_count on new commands xilinx_spips: lqspi: Fix byte/misaligned access xilinx_spips: lqspi: Push more data to tx-fifo xilinx_spips: Multiple debug verbosity levels xilinx_spips: Debug msgs for Snoop state xilinx_spips: Fix striping behaviour xilinx_spips: Fix CTRL register RW bits xilinx_spips: lqspi: Dont touch config register xilinx_spips: Implement automatic CS xilinx_spips: Add automatic start support xilinx_spips: Trash LQ page cache on mode change xilinx_spips: Fix QSPI FIFO size ... Message-id: 1370277021-26129-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/arm/xilinx_zynq.c')
| -rw-r--r-- | hw/arm/xilinx_zynq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 41505c32ba..4602a6f579 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -66,7 +66,7 @@ static inline void zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq, int num_busses = is_qspi ? NUM_QSPI_BUSSES : 1; int num_ss = is_qspi ? NUM_QSPI_FLASHES : NUM_SPI_FLASHES; - dev = qdev_create(NULL, "xilinx,spips"); + dev = qdev_create(NULL, is_qspi ? "xlnx.ps7-qspi" : "xlnx.ps7-spi"); qdev_prop_set_uint8(dev, "num-txrx-bytes", is_qspi ? 4 : 1); qdev_prop_set_uint8(dev, "num-ss-bits", num_ss); qdev_prop_set_uint8(dev, "num-busses", num_busses); |