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| author | Cédric Le Goater <clg@kaod.org> | 2023-06-07 06:39:43 +0200 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2023-06-15 18:35:58 +0200 |
| commit | 42bea956f6f7477c06186c7add62fa0107a27a9c (patch) | |
| tree | cd064670357d84634a6f10abcbf1564df3bc76bf /hw/arm | |
| parent | f65f6ad5a749bc2d24a083da3544f47a19e7e81f (diff) | |
| download | focaccia-qemu-42bea956f6f7477c06186c7add62fa0107a27a9c.tar.gz focaccia-qemu-42bea956f6f7477c06186c7add62fa0107a27a9c.zip | |
target/arm: Allow users to set the number of VFP registers
Cortex A7 CPUs with an FPU implementing VFPv4 without NEON support have 16 64-bit FPU registers and not 32 registers. Let users set the number of VFP registers with a CPU property. The primary use case of this property is for the Cortex A7 of the Aspeed AST2600 SoC. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/aspeed_ast2600.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 1bf1246148..a8b3a8065a 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -316,6 +316,8 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) &error_abort); object_property_set_bool(OBJECT(&s->cpu[i]), "neon", false, &error_abort); + object_property_set_bool(OBJECT(&s->cpu[i]), "vfp-d32", false, + &error_abort); object_property_set_link(OBJECT(&s->cpu[i]), "memory", OBJECT(s->memory), &error_abort); |