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| author | Kane-Chen-AS <kane_chen@aspeedtech.com> | 2025-08-12 17:40:03 +0800 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-09-29 18:00:20 +0200 |
| commit | fdad6ec30dfb87df0980887a4c22e55ccf65f9c3 (patch) | |
| tree | ac42c5ad8dca11a9c704e9b54a4fffb93b2dbc3e /hw/arm | |
| parent | 8970c95c4db99dd44ff463acc14c69510776cdee (diff) | |
| download | focaccia-qemu-fdad6ec30dfb87df0980887a4c22e55ccf65f9c3.tar.gz focaccia-qemu-fdad6ec30dfb87df0980887a4c22e55ccf65f9c3.zip | |
hw/arm: Integrate ASPEED OTP memory support into AST1030 SoCs
The has_otp attribute is enabled in the SBC subclasses for AST1030 to control the presence of OTP support per SoC type. Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250812094011.2617526-7-kane_chen@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/aspeed_ast10x0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index e6e1ee63c1..c446e70b24 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -154,7 +154,7 @@ static void aspeed_soc_ast1030_init(Object *obj) object_initialize_child(obj, "peci", &s->peci, TYPE_ASPEED_PECI); - object_initialize_child(obj, "sbc", &s->sbc, TYPE_ASPEED_SBC); + object_initialize_child(obj, "sbc", &s->sbc, TYPE_ASPEED_AST10X0_SBC); for (i = 0; i < sc->wdts_num; i++) { snprintf(typename, sizeof(typename), "aspeed.wdt-%s", socname); |