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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-11-19 21:55:54 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-12-10 11:44:55 +0000 |
| commit | 6e21a013fbdf54960a079dccc90772bb622e28e8 (patch) | |
| tree | fe61490dd29e358be206973eec13dd354c8ff792 /hw/avr/arduino.c | |
| parent | 83ff3d6add965c9752324de11eac5687121ea826 (diff) | |
| download | focaccia-qemu-6e21a013fbdf54960a079dccc90772bb622e28e8.tar.gz focaccia-qemu-6e21a013fbdf54960a079dccc90772bb622e28e8.zip | |
target/arm: Implement CLRM instruction
In v8.1M the new CLRM instruction allows zeroing an arbitrary set of the general-purpose registers and APSR. Implement this. The encoding is a subset of the LDMIA T2 encoding, using what would be Rn=0b1111 (which UNDEFs for LDMIA). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201119215617.29887-6-peter.maydell@linaro.org
Diffstat (limited to 'hw/avr/arduino.c')
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