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| author | Peter Maydell <peter.maydell@linaro.org> | 2012-07-04 10:50:58 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-07-04 10:50:58 +0000 |
| commit | 8279e04257de022f40e8aaf2c9b6e55a33c10b26 (patch) | |
| tree | 9ed488c157467e532ce8960c47dd05187fdf9d37 /hw/cadence_gem.c | |
| parent | 0325559d05f663fcddfbd88bc00224a27008246e (diff) | |
| download | focaccia-qemu-8279e04257de022f40e8aaf2c9b6e55a33c10b26.tar.gz focaccia-qemu-8279e04257de022f40e8aaf2c9b6e55a33c10b26.zip | |
hw/cadence_gem: Make rx_desc_addr and tx_desc_addr uint32_t
Make the state fields rx_desc_addr and tx_desc_addr uint32_t; this matches the VMStateDescription, and also conforms to how hardware works: the registers don't magically become larger if the device is attached to a CPU with a larger physical address size. It also fixes a compile failure if the target_phys_addr_t type is changed to 64 bits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Diffstat (limited to 'hw/cadence_gem.c')
| -rw-r--r-- | hw/cadence_gem.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/cadence_gem.c b/hw/cadence_gem.c index dbde3920d0..87143caf2d 100644 --- a/hw/cadence_gem.c +++ b/hw/cadence_gem.c @@ -339,8 +339,8 @@ typedef struct { uint8_t phy_loop; /* Are we in phy loopback? */ /* The current DMA descriptor pointers */ - target_phys_addr_t rx_desc_addr; - target_phys_addr_t tx_desc_addr; + uint32_t rx_desc_addr; + uint32_t tx_desc_addr; } GemState; |