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authorBernhard Beschow <shentey@gmail.com>2025-01-11 19:37:00 +0100
committerPeter Maydell <peter.maydell@linaro.org>2025-01-27 13:50:14 +0000
commitb6cd77fbddf020d4dad23476b286fbeb22d4c334 (patch)
treed6a2e8494307152767a9dae87f8e88787c29255a /hw/char/imx_serial.c
parentdeeb9969357d377110ac61fe3c6482c7303313ae (diff)
downloadfocaccia-qemu-b6cd77fbddf020d4dad23476b286fbeb22d4c334.tar.gz
focaccia-qemu-b6cd77fbddf020d4dad23476b286fbeb22d4c334.zip
hw/char/imx_serial: Fix reset value of UFCR register
The value of the UCFR register is respected when echoing characters to the
terminal, but its reset value is reserved. Fix the reset value to the one
documented in the datasheet.

While at it move the related attribute out of the section of unimplemented
registers since its value is actually respected.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/char/imx_serial.c')
-rw-r--r--hw/char/imx_serial.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c
index 7c353fde50..cb6761d40e 100644
--- a/hw/char/imx_serial.c
+++ b/hw/char/imx_serial.c
@@ -160,6 +160,7 @@ static void imx_serial_reset(IMXSerialState *s)
     s->ucr3 = 0x700;
     s->ubmr = 0;
     s->ubrc = 4;
+    s->ufcr = BIT(11) | BIT(0);
 
     fifo32_reset(&s->rx_fifo);
     timer_del(&s->ageing_timer);