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authorYanfei Xu <yanfei.xu@bytedance.com>2025-08-18 21:11:27 +0800
committerPeter Xu <peterx@redhat.com>2025-10-03 09:48:02 -0400
commitd943cef76090b5255e68ba38ce6ddf20537b07bc (patch)
treecc2269e4193dfa3354043b73aa6264eebb245f1b /hw/core/cpu-common.c
parent725a9e5f7885a3c0d0cd82022d6eb5a758ac9d47 (diff)
downloadfocaccia-qemu-d943cef76090b5255e68ba38ce6ddf20537b07bc.tar.gz
focaccia-qemu-d943cef76090b5255e68ba38ce6ddf20537b07bc.zip
migration: ensure APIC is loaded prior to VFIO PCI devices
The load procedure of VFIO PCI devices involves setting up IRT
for each VFIO PCI devices. This requires determining whether an
interrupt is single-destination interrupt to decide between
Posted Interrupt(PI) or remapping mode for the IRTE. However,
determining this may require accessing the VM's APIC registers.

For example:
ioctl(vbasedev->fd, VFIO_DEVICE_SET_IRQS, irqs)
  ...
    kvm_arch_irq_bypass_add_producer
      kvm_x86_call(pi_update_irte)
        vmx_pi_update_irte
          kvm_intr_is_single_vcpu

If the LAPIC has not been loaded yet, interrupts will use remapping
mode. To prevent the fallback of interrupt mode, keep APIC is always
loaded prior to VFIO PCI devices.

Signed-off-by: Yicong Shen <shenyicong.1023@bytedance.com>
Signed-off-by: Yanfei Xu <yanfei.xu@bytedance.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Link: https://lore.kernel.org/r/20250818131127.1021648-1-yanfei.xu@bytedance.com
Signed-off-by: Peter Xu <peterx@redhat.com>
Diffstat (limited to 'hw/core/cpu-common.c')
0 files changed, 0 insertions, 0 deletions