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| author | Richard Henderson <richard.henderson@linaro.org> | 2025-08-27 15:27:50 +1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-08-30 06:59:26 +1000 |
| commit | f3d9393791e6c02bae99f920d350e65cd299fed1 (patch) | |
| tree | afe3ff17f514f0cff79100388dc4e7e3a60584e8 /hw/core/cpu-common.c | |
| parent | ca18b336e12c8433177a3cd639c5bf757952adaa (diff) | |
| download | focaccia-qemu-f3d9393791e6c02bae99f920d350e65cd299fed1.tar.gz focaccia-qemu-f3d9393791e6c02bae99f920d350e65cd299fed1.zip | |
hw/core: Dump cpu_reset in the reset.exit phase
During reset.hold, the cpu is in an inconsistent state, where the leaf class has not had a chance to initialize state at all. This is visible as a SIGSEGV in "qemu-system-sparc64 -d cpu_reset". Move the dump to the exit phase, where all initialization is certain to be complete. Reported-by: Henk van der Laak <henk@laaksoft.nl> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/core/cpu-common.c')
| -rw-r--r-- | hw/core/cpu-common.c | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 39e674aca2..26321be785 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -119,11 +119,6 @@ static void cpu_common_reset_hold(Object *obj, ResetType type) { CPUState *cpu = CPU(obj); - if (qemu_loglevel_mask(CPU_LOG_RESET)) { - qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index); - log_cpu_state(cpu, cpu->cc->reset_dump_flags); - } - cpu->interrupt_request = 0; cpu->halted = cpu->start_powered_off; cpu->mem_io_pc = 0; @@ -137,6 +132,16 @@ static void cpu_common_reset_hold(Object *obj, ResetType type) cpu_exec_reset_hold(cpu); } +static void cpu_common_reset_exit(Object *obj, ResetType type) +{ + if (qemu_loglevel_mask(CPU_LOG_RESET)) { + CPUState *cpu = CPU(obj); + + qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index); + log_cpu_state(cpu, cpu->cc->reset_dump_flags); + } +} + ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) { ObjectClass *oc; @@ -380,6 +385,7 @@ static void cpu_common_class_init(ObjectClass *klass, const void *data) dc->realize = cpu_common_realizefn; dc->unrealize = cpu_common_unrealizefn; rc->phases.hold = cpu_common_reset_hold; + rc->phases.exit = cpu_common_reset_exit; cpu_class_init_props(dc); /* * Reason: CPUs still need special care by board code: wiring up |