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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-01-23 19:56:20 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-03-09 17:00:46 +0100 |
| commit | ca05578fc80f4253ed19f4c4128a4cbd5b83f0b5 (patch) | |
| tree | 29c58801fd4b070fd8dc1a2a5acdbaa0fe7769a6 /hw/core/cpu-system.c | |
| parent | 1405d7e60d8c98a28b29885f70da4f2e4407fbc6 (diff) | |
| download | focaccia-qemu-ca05578fc80f4253ed19f4c4128a4cbd5b83f0b5.tar.gz focaccia-qemu-ca05578fc80f4253ed19f4c4128a4cbd5b83f0b5.zip | |
cpus: Register VMState per user / system emulation
Simplify cpu-target.c by extracting mixed vmstate code into the cpu_vmstate_register() / cpu_vmstate_unregister() helpers, implemented in cpu-user.c and cpu-system.c. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-20-philmd@linaro.org>
Diffstat (limited to 'hw/core/cpu-system.c')
| -rw-r--r-- | hw/core/cpu-system.c | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index e511507e13..6c89d76e49 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -21,11 +21,15 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "exec/address-spaces.h" +#include "exec/cputlb.h" #include "exec/memory.h" +#include "exec/tb-flush.h" #include "exec/tswap.h" #include "hw/qdev-core.h" #include "hw/qdev-properties.h" #include "hw/core/sysemu-cpu-ops.h" +#include "migration/vmstate.h" +#include "system/tcg.h" bool cpu_paging_enabled(const CPUState *cpu) { @@ -194,3 +198,114 @@ void cpu_exec_initfn(CPUState *cpu) cpu->memory = get_system_memory(); object_ref(OBJECT(cpu->memory)); } + +static int cpu_common_post_load(void *opaque, int version_id) +{ + if (tcg_enabled()) { + CPUState *cpu = opaque; + + /* + * 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the + * version_id is increased. + */ + cpu->interrupt_request &= ~0x01; + + tlb_flush(cpu); + + /* + * loadvm has just updated the content of RAM, bypassing the + * usual mechanisms that ensure we flush TBs for writes to + * memory we've translated code from. So we must flush all TBs, + * which will now be stale. + */ + tb_flush(cpu); + } + + return 0; +} + +static int cpu_common_pre_load(void *opaque) +{ + CPUState *cpu = opaque; + + cpu->exception_index = -1; + + return 0; +} + +static bool cpu_common_exception_index_needed(void *opaque) +{ + CPUState *cpu = opaque; + + return tcg_enabled() && cpu->exception_index != -1; +} + +static const VMStateDescription vmstate_cpu_common_exception_index = { + .name = "cpu_common/exception_index", + .version_id = 1, + .minimum_version_id = 1, + .needed = cpu_common_exception_index_needed, + .fields = (const VMStateField[]) { + VMSTATE_INT32(exception_index, CPUState), + VMSTATE_END_OF_LIST() + } +}; + +static bool cpu_common_crash_occurred_needed(void *opaque) +{ + CPUState *cpu = opaque; + + return cpu->crash_occurred; +} + +static const VMStateDescription vmstate_cpu_common_crash_occurred = { + .name = "cpu_common/crash_occurred", + .version_id = 1, + .minimum_version_id = 1, + .needed = cpu_common_crash_occurred_needed, + .fields = (const VMStateField[]) { + VMSTATE_BOOL(crash_occurred, CPUState), + VMSTATE_END_OF_LIST() + } +}; + +const VMStateDescription vmstate_cpu_common = { + .name = "cpu_common", + .version_id = 1, + .minimum_version_id = 1, + .pre_load = cpu_common_pre_load, + .post_load = cpu_common_post_load, + .fields = (const VMStateField[]) { + VMSTATE_UINT32(halted, CPUState), + VMSTATE_UINT32(interrupt_request, CPUState), + VMSTATE_END_OF_LIST() + }, + .subsections = (const VMStateDescription * const []) { + &vmstate_cpu_common_exception_index, + &vmstate_cpu_common_crash_occurred, + NULL + } +}; + +void cpu_vmstate_register(CPUState *cpu) +{ + if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { + vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu); + } + if (cpu->cc->sysemu_ops->legacy_vmsd != NULL) { + vmstate_register(NULL, cpu->cpu_index, + cpu->cc->sysemu_ops->legacy_vmsd, cpu); + } +} + +void cpu_vmstate_unregister(CPUState *cpu) +{ + CPUClass *cc = CPU_GET_CLASS(cpu); + + if (cc->sysemu_ops->legacy_vmsd != NULL) { + vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu); + } + if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { + vmstate_unregister(NULL, &vmstate_cpu_common, cpu); + } +} |