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| author | Sandipan Das <sandipan.das@amd.com> | 2024-10-24 17:18:21 -0500 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2024-10-31 18:28:32 +0100 |
| commit | 209b0ac12074341d0093985eb9ad3e7edb252ce5 (patch) | |
| tree | 6f1e22f4719c781cd7d90bf5ea166790edd6e5da /hw/core/eif.h | |
| parent | 9c882ad4dc96f658ff9f92b88b3749d0398e6fa2 (diff) | |
| download | focaccia-qemu-209b0ac12074341d0093985eb9ad3e7edb252ce5.tar.gz focaccia-qemu-209b0ac12074341d0093985eb9ad3e7edb252ce5.zip | |
target/i386: Add PerfMonV2 feature bit
CPUID leaf 0x80000022, i.e. ExtPerfMonAndDbg, advertises new performance monitoring features for AMD processors. Bit 0 of EAX indicates support for Performance Monitoring Version 2 (PerfMonV2) features. If found to be set during PMU initialization, the EBX bits can be used to determine the number of available counters for different PMUs. It also denotes the availability of global control and status registers. Add the required CPUID feature word and feature bit to allow guests to make use of the PerfMonV2 features. Signed-off-by: Sandipan Das <sandipan.das@amd.com> Signed-off-by: Babu Moger <babu.moger@amd.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/a96f00ee2637674c63c61e9fc4dee343ea818053.1729807947.git.babu.moger@amd.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/core/eif.h')
0 files changed, 0 insertions, 0 deletions