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| author | Hervé Poussineau <hpoussin@reactos.org> | 2018-01-06 16:37:20 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@redhat.com> | 2019-11-05 23:33:12 +0100 |
| commit | 5790b757cfbe0ccdd16e0d6bfd783d1849ca02c1 (patch) | |
| tree | e4d083affa01991e8a5337ab251cab47a8f8000b /hw/core/irq.c | |
| parent | 10386385bce2eb61153a7d2bffd50f38dd4270b8 (diff) | |
| download | focaccia-qemu-5790b757cfbe0ccdd16e0d6bfd783d1849ca02c1.tar.gz focaccia-qemu-5790b757cfbe0ccdd16e0d6bfd783d1849ca02c1.zip | |
piix4: Add the Reset Control Register
The RCR I/O port (0xcf9) is used to generate a hard reset or a soft reset. Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20171216090228.28505-7-hpoussin@reactos.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> [PMD: rebased, updated includes] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Diffstat (limited to 'hw/core/irq.c')
0 files changed, 0 insertions, 0 deletions