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authorRichard Henderson <richard.henderson@linaro.org>2023-02-27 12:58:32 -1000
committerPeter Maydell <peter.maydell@linaro.org>2023-03-06 14:08:12 +0000
commit0ffe5b7ba883c6adbbf821f9be03475d96a2e35c (patch)
treef3acfee8711dd6086f8947cee13d0117c8d639bc /hw/core/loader.c
parentfcc7404eff24b4c8b322fb27ca5ae7f3113129c3 (diff)
downloadfocaccia-qemu-0ffe5b7ba883c6adbbf821f9be03475d96a2e35c.tar.gz
focaccia-qemu-0ffe5b7ba883c6adbbf821f9be03475d96a2e35c.zip
target/arm: Rewrite check_s2_mmu_setup
Integrate neighboring code from get_phys_addr_lpae which computed
starting level, as it is easier to validate when doing both at the
same time.  Mirror the checks at the start of AArch{64,32}.S2Walk,
especially S2InvalidSL and S2InconsistentSL.

This reverts 49ba115bb74, which was incorrect -- there is nothing
in the ARM pseudocode that depends on TxSZ, i.e. outputsize; the
pseudocode is consistent in referencing PAMax.

Fixes: 49ba115bb74 ("target/arm: Pass outputsize down to check_s2_mmu_setup")
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227225832.816605-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/core/loader.c')
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