diff options
| author | Taylor Simpson <tsimpson@quicinc.com> | 2021-04-08 20:07:53 -0500 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-05-01 16:06:11 -0700 |
| commit | 7aa9ffab79eb2f3ba998333e3709c7b8dbc630f1 (patch) | |
| tree | 0186e462d227ea98bf479e54c56adcb612911b1c /hw/core/loader.c | |
| parent | 0d0b91a8049967f5e3bfd86e9d372d61b4019b77 (diff) | |
| download | focaccia-qemu-7aa9ffab79eb2f3ba998333e3709c7b8dbc630f1.tar.gz focaccia-qemu-7aa9ffab79eb2f3ba998333e3709c7b8dbc630f1.zip | |
Hexagon (target/hexagon) load into shifted register instructions
The following instructions are added
L2_loadalignb_io Ryy32 = memb_fifo(Rs32+#s11:1)
L2_loadalignh_io Ryy32 = memh_fifo(Rs32+#s11:1)
L4_loadalignb_ur Ryy32 = memb_fifo(Rt32<<#u2+#U6)
L4_loadalignh_ur Ryy32 = memh_fifo(Rt32<<#u2+#U6)
L4_loadalignb_ap Ryy32 = memb_fifo(Re32=#U6)
L4_loadalignh_ap Ryy32 = memh_fifo(Re32=#U6)
L2_loadalignb_pr Ryy32 = memb_fifo(Rx32++Mu2)
L2_loadalignh_pr Ryy32 = memh_fifo(Rx32++Mu2)
L2_loadalignb_pbr Ryy32 = memb_fifo(Rx32++Mu2:brev)
L2_loadalignh_pbr Ryy32 = memh_fifo(Rx32++Mu2:brev)
L2_loadalignb_pi Ryy32 = memb_fifo(Rx32++#s4:1)
L2_loadalignh_pi Ryy32 = memh_fifo(Rx32++#s4:1)
L2_loadalignb_pci Ryy32 = memb_fifo(Rx32++#s4:1:circ(Mu2))
L2_loadalignh_pci Ryy32 = memh_fifo(Rx32++#s4:1:circ(Mu2))
L2_loadalignb_pcr Ryy32 = memb_fifo(Rx32++I:circ(Mu2))
L2_loadalignh_pcr Ryy32 = memh_fifo(Rx32++I:circ(Mu2))
Test cases in tests/tcg/hexagon/load_align.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-26-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/core/loader.c')
0 files changed, 0 insertions, 0 deletions