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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-26 11:59:55 +0100 |
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| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-25 15:29:36 +0000 |
| commit | a18d783e649d761a7556f6d964efa453bb4f3a06 (patch) | |
| tree | f9d535162aa84e7f32d82ab53104f1700660bbcd /hw/core/machine.c | |
| parent | f6453695f9f87ba1974eca13322864810c90b9f0 (diff) | |
| download | focaccia-qemu-a18d783e649d761a7556f6d964efa453bb4f3a06.tar.gz focaccia-qemu-a18d783e649d761a7556f6d964efa453bb4f3a06.zip | |
tcg/riscv: Implement movcond
Implement with and without Zicond. Without Zicond, we were letting the middle-end expand to a 5 insn sequence; better to use a branch over a single insn. Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/core/machine.c')
0 files changed, 0 insertions, 0 deletions