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| author | Alistair Francis <Alistair.Francis@wdc.com> | 2019-04-20 02:26:54 +0000 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2019-05-24 12:09:24 -0700 |
| commit | 0a01f2eecba47a48c9d06e3fb9acbd2a8a842cfc (patch) | |
| tree | b68ccceb76bda361e2dfedec4fe55fe34040acbe /hw/core/qdev-properties-system.c | |
| parent | 356d74192a035c71a78a22d24812a6df6099ae40 (diff) | |
| download | focaccia-qemu-0a01f2eecba47a48c9d06e3fb9acbd2a8a842cfc.tar.gz focaccia-qemu-0a01f2eecba47a48c9d06e3fb9acbd2a8a842cfc.zip | |
target/riscv: Trigger interrupt on MIP update asynchronously
The requirement of holding the iothread_mutex is burdersome when swapping the background and foreground registers in the Hypervisor extension. To avoid the requrirement let's set the interrupt asynchronously. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'hw/core/qdev-properties-system.c')
0 files changed, 0 insertions, 0 deletions