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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-09-07 13:54:52 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-09-07 13:54:52 +0100 |
| commit | 1d2091bc75ab7f9e2c43082f361a528a63c79527 (patch) | |
| tree | 9061bfc54e70d192b4525baf445fdcf9b17cb366 /hw/core/qdev-properties-system.c | |
| parent | 1e577cc7cffd3de14dbd321de5c3ef191c6ab07f (diff) | |
| download | focaccia-qemu-1d2091bc75ab7f9e2c43082f361a528a63c79527.tar.gz focaccia-qemu-1d2091bc75ab7f9e2c43082f361a528a63c79527.zip | |
target/arm: Register second AddressSpace for secure v8M CPUs
If a v8M CPU supports the security extension then we need to give it two AddressSpaces, the same way we do already for an A profile core with EL3. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1503414539-28762-5-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'hw/core/qdev-properties-system.c')
0 files changed, 0 insertions, 0 deletions