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| author | Will Newton <will.newton@linaro.org> | 2014-01-07 17:19:14 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-01-07 19:18:08 +0000 |
| commit | 6a7413385d731a97cbd45c7c4b1c2cbd73d94409 (patch) | |
| tree | c51f41bea1eceea882c7cd3715d576d2a6270431 /hw/core/qdev.c | |
| parent | 3617f86ba87a0f54b74dbaed0d92da13beb14e45 (diff) | |
| download | focaccia-qemu-6a7413385d731a97cbd45c7c4b1c2cbd73d94409.tar.gz focaccia-qemu-6a7413385d731a97cbd45c7c4b1c2cbd73d94409.zip | |
target-arm: A64: Add floating-point<->integer conversion instructions
Add support for the AArch64 floating-point <-> integer conversion instructions to disas_fpintconv. In the process we can rearrange and simplify the detection of unallocated encodings a little. We also correct a typo in the instruction encoding diagram for this instruction group: bit 21 is 1, not 0. Signed-off-by: Will Newton <will.newton@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'hw/core/qdev.c')
0 files changed, 0 insertions, 0 deletions