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| author | Vijaya Kumar K <Vijaya.Kumar@cavium.com> | 2017-02-23 17:21:10 +0530 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-02-28 17:10:00 +0000 |
| commit | 6692aac41119906409dfa634ecbe3ef1634b5e5c (patch) | |
| tree | 0937053572eb7d05a61f945ecd788a727665e6ff /hw/core/sysbus.c | |
| parent | 3a5eb5b4a929397d8678df9415c14c691c5ba969 (diff) | |
| download | focaccia-qemu-6692aac41119906409dfa634ecbe3ef1634b5e5c.tar.gz focaccia-qemu-6692aac41119906409dfa634ecbe3ef1634b5e5c.zip | |
hw/intc/arm_gicv3_kvm: Add ICC_SRE_EL1 register to vmstate
To Save and Restore ICC_SRE_EL1 register introduce vmstate subsection and load only if non-zero. Also initialize icc_sre_el1 with to 0x7 in pre_load function. Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@cavium.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 1487850673-26455-3-git-send-email-vijay.kilari@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/core/sysbus.c')
0 files changed, 0 insertions, 0 deletions