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authorPalmer Dabbelt <palmer@rivosinc.com>2023-03-01 18:09:48 -0800
committerPalmer Dabbelt <palmer@rivosinc.com>2023-03-01 18:09:48 -0800
commit37151032989ecf6e7ce8b65bc7bcb400d0318b2c (patch)
tree6ec20fbbafd6a6002581b0bc927535f9131e9a88 /hw/core
parent0b28c7ea0edbb6858adcce7f0ddf761441e730e8 (diff)
parent86247c51fff458fb238a1690232c16e8425b15d3 (diff)
downloadfocaccia-qemu-37151032989ecf6e7ce8b65bc7bcb400d0318b2c.tar.gz
focaccia-qemu-37151032989ecf6e7ce8b65bc7bcb400d0318b2c.zip
Merge patch series "target/riscv: some vector_helper.c cleanups"
Daniel Henrique Barboza <dbarboza@ventanamicro.com> says:

This is a re-send of patch 1, which is already reviewed, with a
follow-up that uses riscv_cpu_cfg() in the remaining of the file. This
was suggested by Weiwei Li in the "[PATCH 0/4] RISCVCPUConfig related
cleanups" review. Patch 1 makes the work of patch 2 easier since it
eliminated some uses of env_archcpu() we want to avoid.

* b4-shazam-merge:
  target/riscv/vector_helper.c: avoid env_archcpu() when reading RISCVCPUConfig
  target/riscv/vector_helper.c: create vext_set_tail_elems_1s()

Message-ID: <20230226170514.588071-1-dbarboza@ventanamicro.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'hw/core')
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