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authorRichard Henderson <richard.henderson@linaro.org>2024-12-13 15:25:18 +0000
committerRichard Henderson <richard.henderson@linaro.org>2024-12-15 12:54:47 -0600
commit804467e148a254a503834a2c712cad827f6f4b25 (patch)
tree36f955f79a4e51b0e639aa8f4f819c5539fffeaa /hw/cpu/arm11mpcore.c
parentf5ca2d6233c88464bcf2616bc8697247cb57bcc5 (diff)
downloadfocaccia-qemu-804467e148a254a503834a2c712cad827f6f4b25.tar.gz
focaccia-qemu-804467e148a254a503834a2c712cad827f6f4b25.zip
hw/cpu: Constify all Property
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/cpu/arm11mpcore.c')
-rw-r--r--hw/cpu/arm11mpcore.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c
index 89c4e35143..193fc182ab 100644
--- a/hw/cpu/arm11mpcore.c
+++ b/hw/cpu/arm11mpcore.c
@@ -131,7 +131,7 @@ static void mpcore_priv_initfn(Object *obj)
     object_initialize_child(obj, "wdtimer", &s->wdtimer, TYPE_ARM_MPTIMER);
 }
 
-static Property mpcore_priv_properties[] = {
+static const Property mpcore_priv_properties[] = {
     DEFINE_PROP_UINT32("num-cpu", ARM11MPCorePriveState, num_cpu, 1),
     /* The ARM11 MPCORE TRM says the on-chip controller may have
      * anything from 0 to 224 external interrupt IRQ lines (with another