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| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2023-03-02 13:37:05 +0000 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2023-03-07 12:39:00 -0500 |
| commit | 7e33517fdd25ce2dc95b22b8afd743a979d8dfb4 (patch) | |
| tree | df21b5748009ec96516b0e97bb776dce387e96c2 /hw/cxl/cxl-component-utils.c | |
| parent | 47f0e7ab3272737c174ca68c03843e0d1996dc22 (diff) | |
| download | focaccia-qemu-7e33517fdd25ce2dc95b22b8afd743a979d8dfb4.tar.gz focaccia-qemu-7e33517fdd25ce2dc95b22b8afd743a979d8dfb4.zip | |
hw/pci-bridge/cxl_root_port: Wire up MSI
Done to avoid fixing ACPI route description of traditional PCI interrupts on q35 and because we should probably move with the times anyway. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Message-Id: <20230302133709.30373-5-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Fan Ni <fan.ni@samsung.com>
Diffstat (limited to 'hw/cxl/cxl-component-utils.c')
0 files changed, 0 insertions, 0 deletions