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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-04-29 15:40:47 +0100
committerMichael S. Tsirkin <mst@redhat.com>2022-05-13 06:13:36 -0400
commit92fd46b68a0ca2f37d46fd69616034b2703966b2 (patch)
treecaa68cc418a2a677e9fc6c0151736193adfb1a15 /hw/cxl/cxl-component-utils.c
parent3ebe676a3463b886cfc112b3eff58e4991051b0d (diff)
downloadfocaccia-qemu-92fd46b68a0ca2f37d46fd69616034b2703966b2.tar.gz
focaccia-qemu-92fd46b68a0ca2f37d46fd69616034b2703966b2.zip
qtests/cxl: Add initial root port and CXL type3 tests
At this stage we can boot configurations with host bridges,
root ports and type 3 memory devices, so add appropriate
tests.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220429144110.25167-23-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/cxl/cxl-component-utils.c')
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