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authorRichard Henderson <rth@twiddle.net>2016-12-15 11:58:17 -0800
committerRichard Henderson <rth@twiddle.net>2017-01-23 09:52:40 -0800
commit129e9cc3a1792b66bd189838d58f7a2944602a82 (patch)
tree230f3e568a34145fa022fcbf3daf80e52f20fc90 /hw/display/framebuffer.c
parent61766fe9e2d37ac4928119eabfe2250bd8f43b11 (diff)
downloadfocaccia-qemu-129e9cc3a1792b66bd189838d58f7a2944602a82.tar.gz
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target-hppa: Add nullification framework
The HPPA cpu has a unique form of predicated execution in which
almost any instruction can set the PSW[N] (or "nullify") bit,
which suppresses execution (and even decoding) of the following
instruction.  Execution of a nullified insn clears the PSW[N] bit.

This adds a generic framework for branching over nullified insns,
or for sufficiently simple insns, transforming the writeback of
the result to a conditional move.  In the process, we want to be
able to represent PSW[N] as a TCG condition, which implies management
of the related tcg temps.

Signed-off-by: Richard Henderson <rth@twiddle.net>
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