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authorAnthony Liguori <aliguori@us.ibm.com>2013-07-15 14:02:12 -0500
committerAnthony Liguori <aliguori@us.ibm.com>2013-07-15 14:02:12 -0500
commit1750d019cea1e2383d3283eaad38cd0f93d07b11 (patch)
treef5dca41ce6ed50bcedba470239abbe54ccbe7154 /hw/dma/omap_dma.c
parenta34001fab5da2d0df605a8b83880c917c8aa0606 (diff)
parentb25a83f0538fceede15cba6cfd6ea0f1ffc9d777 (diff)
downloadfocaccia-qemu-1750d019cea1e2383d3283eaad38cd0f93d07b11.tar.gz
focaccia-qemu-1750d019cea1e2383d3283eaad38cd0f93d07b11.zip
Merge remote-tracking branch 'pmaydell/tags/pull-arm-devs-20130715' into staging
arm-devs queue

# gpg: Signature made Mon 15 Jul 2013 10:53:44 AM CDT using RSA key ID 14360CDE
# gpg: Can't check signature: public key not found

# By Peter Maydell (4) and others
# Via Peter Maydell
* pmaydell/tags/pull-arm-devs-20130715:
  ARM/highbank: add support for Calxeda ECX-2000 / Midway
  ARM/highbank: prepare for adding similar machines
  hw/arm/vexpress: Add alias for flash at address 0 on A15 board
  hw/dma/omap_dma: Fix bugs with DMA requests above 32
  sd/pl181.c: Avoid undefined shift behaviour in RWORD macro
  hw/cpu/a15mpcore: Correct default value for num-irq
  char/cadence_uart: Fix reset for unattached instances

Message-id: 1373904095-27592-1-git-send-email-peter.maydell@linaro.org
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/dma/omap_dma.c')
-rw-r--r--hw/dma/omap_dma.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/hw/dma/omap_dma.c b/hw/dma/omap_dma.c
index a81ffc4026..0e8cccd27f 100644
--- a/hw/dma/omap_dma.c
+++ b/hw/dma/omap_dma.c
@@ -248,7 +248,7 @@ static void omap_dma_deactivate_channel(struct omap_dma_s *s,
 
     /* Don't deactive the channel if it is synchronized and the DMA request is
        active */
-    if (ch->sync && ch->enable && (s->dma->drqbmp & (1 << ch->sync)))
+    if (ch->sync && ch->enable && (s->dma->drqbmp & (1ULL << ch->sync)))
         return;
 
     if (ch->active) {
@@ -268,8 +268,9 @@ static void omap_dma_enable_channel(struct omap_dma_s *s,
         /* TODO: theoretically if ch->sync && ch->prefetch &&
          * !s->dma->drqbmp[ch->sync], we should also activate and fetch
          * from source and then stall until signalled.  */
-        if ((!ch->sync) || (s->dma->drqbmp & (1 << ch->sync)))
+        if ((!ch->sync) || (s->dma->drqbmp & (1ULL << ch->sync))) {
             omap_dma_activate_channel(s, ch);
+        }
     }
 }
 
@@ -1551,12 +1552,12 @@ static void omap_dma_request(void *opaque, int drq, int req)
     struct omap_dma_s *s = (struct omap_dma_s *) opaque;
     /* The request pins are level triggered in QEMU.  */
     if (req) {
-        if (~s->dma->drqbmp & (1 << drq)) {
-            s->dma->drqbmp |= 1 << drq;
+        if (~s->dma->drqbmp & (1ULL << drq)) {
+            s->dma->drqbmp |= 1ULL << drq;
             omap_dma_process_request(s, drq);
         }
     } else
-        s->dma->drqbmp &= ~(1 << drq);
+        s->dma->drqbmp &= ~(1ULL << drq);
 }
 
 /* XXX: this won't be needed once soc_dma knows about clocks.  */