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| author | Stefan Hajnoczi <stefanha@redhat.com> | 2025-01-14 12:46:56 -0500 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2025-01-14 12:46:56 -0500 |
| commit | 7433709a147706ad7d1956b15669279933d0f82b (patch) | |
| tree | 7eb2cb6745846bc736c68ebbbaeff7a9e39f4104 /hw/gpio/imx_gpio.c | |
| parent | e8aa7fdcddfc8589bdc7c973a052e76e8f999455 (diff) | |
| parent | 838cf72b5d2cd875897d8bdfea4b23f6d9fdc602 (diff) | |
| download | focaccia-qemu-7433709a147706ad7d1956b15669279933d0f82b.tar.gz focaccia-qemu-7433709a147706ad7d1956b15669279933d0f82b.zip | |
Merge tag 'hw-misc-20250113' of https://github.com/philmd/qemu into staging
Misc HW patches queue - Silent unuseful DTC warnings (Philippe) - Unify QDev hotplug decision logic (Akihiko) - Rework XilinX EthLite RAM buffers (Philippe) - Convert vmcoreinfo to 3-phase reset (Philippe) - Convert HPPA CPUs to 3-phase reset (Helge) - Fix UFS endianness issue (Keoseong) - Introduce pci_set_enabled (Akihiko) - Clarify Enclave and Firecracker relationship (Alexander) - Set SDHCI DMA interrupt status bit in correct place (Bernhard) - Fix leak in cryptodev-vhost-user backend (Gabriel) - Fixes on PCI USB XHCI (Phil) - Convert DPRINTF to trace events (Nikita, Bernhard) - Remove &first_cpu in TriCore machine (Philippe) - Checkpatch style cleanups (Bibo) - MAINTAINERS updates (Marcin, Gustavo, Akihiko) - Add default configuration for b4 tool (Jiaxun) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmeFTq0ACgkQ4+MsLN6t # wN6F2RAA0hhgXYf1BAn0DQI5O/oOzt6WzkwL/yQhKff1piWMcCZbHCOn8JHETE4R # QTqg+OMGuw4Q55YSwqwHW98JIQI/lRbSUX9Vc3km4QxED5owHiqu9wk//KSLv3TY # y86CRbibb0Uy6vEM4J1WK6ATiLePWZ6qzePQX59f9YEagTLM2XO2DasRu+wGDbt+ # 96fPnT7Tx2Bu5jU8+sZ36mw3wWSJo/pLQBE9siH4N33v2I5ntmMs1Lbe7QscDDsw # 1+OOti3lB4q5chNMYNQyPxvz75QIi9et7wREJM9Vt03OpEpj+vWMGzwZFNLfOmeu # eApgcQP/k6z1+pAGjEo5mwNOZcZtR9I/3Uf/sONvO0N5FlJq9CSOTs7L2EddcFzM # lVDZjwEHIoU1xCohqNy2A0Q1s20dNfBEjPEUCuh+tIvFk9cy1L8uZtBVFNUCb33J # Jq8KAkqXAaVj2tHGa27DwFjSTo4olU/G0WO4AQZNwdxvMQwX88gHOGMJkRmJPRVi # ErKD0/bBfVa6orEAorWYwQSnTP1H/2fGfF6rLtI5GvQtPc/jBG3+KpEOS+vc2nzG # 1fq+Kty8kWsU4Fpw3EUHvflnzG4Ujhuc/nJ+FyQhn89Erb49jxBlu25lQOLVRVa4 # gP+jsgi46+4goYzj1vrpTpBgFPFWKGCl1gGz17ij5WyvVXroRzA= # =+uup # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Jan 2025 12:34:37 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20250113' of https://github.com/philmd/qemu: (55 commits) Add a b4 configuration file MAINTAINERS: Update path to coreaudio.m MAINTAINERS: Add me as the maintainer for ivshmem-flat MAINTAINERS: remove myself from sbsa-ref hw/tricore/triboard: Remove unnecessary use of &first_cpu hw/usb/hcd-xhci-pci: Use event ring 0 if mapping unsupported hw/usb/hcd-xhci-pci: Use modulo to select MSI vector as per spec backends/cryptodev-vhost-user: Fix local_error leaks hw/loongarch/virt: Checkpatch cleanup target/hppa: Speed up hppa_is_pa20() target/hppa: Set PC on vCPU reset target/hppa: Only set PSW 'M' bit on reset hw/hppa: Reset vCPUs calling resettable_reset() target/hppa: Convert hppa_cpu_init() to ResetHold handler tests: Add functional tests for HPPA machines tests/qtest/boot-serial-test: Correct HPPA machine name hw/gpio/imx_gpio: Turn DPRINTF() into trace events hw/i2c/imx_i2c: Convert DPRINTF() to trace events hw/char/imx_serial: Turn some DPRINTF() statements into trace events hw/misc/imx6_src: Convert DPRINTF() to trace events ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'hw/gpio/imx_gpio.c')
| -rw-r--r-- | hw/gpio/imx_gpio.c | 18 |
1 files changed, 7 insertions, 11 deletions
diff --git a/hw/gpio/imx_gpio.c b/hw/gpio/imx_gpio.c index 898f80f8c8..549a281ed7 100644 --- a/hw/gpio/imx_gpio.c +++ b/hw/gpio/imx_gpio.c @@ -24,6 +24,7 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "trace.h" #ifndef DEBUG_IMX_GPIO #define DEBUG_IMX_GPIO 0 @@ -34,14 +35,6 @@ typedef enum IMXGPIOLevel { IMX_GPIO_LEVEL_HIGH = 1, } IMXGPIOLevel; -#define DPRINTF(fmt, args...) \ - do { \ - if (DEBUG_IMX_GPIO) { \ - fprintf(stderr, "[%s]%s: " fmt , TYPE_IMX_GPIO, \ - __func__, ##args); \ - } \ - } while (0) - static const char *imx_gpio_reg_name(uint32_t reg) { switch (reg) { @@ -111,6 +104,8 @@ static void imx_gpio_set(void *opaque, int line, int level) IMXGPIOState *s = IMX_GPIO(opaque); IMXGPIOLevel imx_level = level ? IMX_GPIO_LEVEL_HIGH : IMX_GPIO_LEVEL_LOW; + trace_imx_gpio_set(DEVICE(s)->canonical_path, line, imx_level); + imx_gpio_set_int_line(s, line, imx_level); /* this is an input signal, so set PSR */ @@ -200,7 +195,8 @@ static uint64_t imx_gpio_read(void *opaque, hwaddr offset, unsigned size) break; } - DPRINTF("(%s) = 0x%" PRIx32 "\n", imx_gpio_reg_name(offset), reg_value); + trace_imx_gpio_read(DEVICE(s)->canonical_path, imx_gpio_reg_name(offset), + reg_value); return reg_value; } @@ -210,8 +206,8 @@ static void imx_gpio_write(void *opaque, hwaddr offset, uint64_t value, { IMXGPIOState *s = IMX_GPIO(opaque); - DPRINTF("(%s, value = 0x%" PRIx32 ")\n", imx_gpio_reg_name(offset), - (uint32_t)value); + trace_imx_gpio_write(DEVICE(s)->canonical_path, imx_gpio_reg_name(offset), + value); switch (offset) { case DR_ADDR: |