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authorPeter Maydell <peter.maydell@linaro.org>2024-03-07 12:19:01 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-03-07 12:19:01 +0000
commitc6b0ecb236ba6f8c29cf00c93494901aa22e4dae (patch)
tree2151d16415c87b1adef808b86aa612c40d9cfb9c /hw/gpio/stm32l4x5_gpio.c
parent1e8d14037bff6c235917340177c5f9977c564ec0 (diff)
downloadfocaccia-qemu-c6b0ecb236ba6f8c29cf00c93494901aa22e4dae.tar.gz
focaccia-qemu-c6b0ecb236ba6f8c29cf00c93494901aa22e4dae.zip
target/arm: use FIELD macro for CNTHCTL bit definitions
We prefer the FIELD macro over ad-hoc #defines for register bits;
switch CNTHCTL to that style before we add any more bits.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240301183219.2424889-4-peter.maydell@linaro.org
Diffstat (limited to 'hw/gpio/stm32l4x5_gpio.c')
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