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| author | Linus Walleij <linus.walleij@linaro.org> | 2018-03-01 11:05:45 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-03-01 11:05:45 +0000 |
| commit | 839a2b28d01290c96554be42c3faaa05c847c2e3 (patch) | |
| tree | 25dd41bbf716e885af0196d523a563b703673e9f /hw/i2c/i2c-ddc.c | |
| parent | aa88d7ad28eafaa7ac187d5bbb0c46f987fac3a4 (diff) | |
| download | focaccia-qemu-839a2b28d01290c96554be42c3faaa05c847c2e3.tar.gz focaccia-qemu-839a2b28d01290c96554be42c3faaa05c847c2e3.zip | |
hw/i2c-ddc: Do not fail writes
The tx function of the DDC I2C slave emulation was returning 1 on all writes resulting in NACK in the I2C bus. Changing it to 0 makes the DDC I2C work fine with bit-banged I2C such as the versatile I2C. I guess it was not affecting whatever I2C controller this was used with until now, but with the Versatile I2C it surely does not work. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Message-id: 20180227104903.21353-4-linus.walleij@linaro.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/i2c/i2c-ddc.c')
| -rw-r--r-- | hw/i2c/i2c-ddc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/i2c/i2c-ddc.c b/hw/i2c/i2c-ddc.c index 199dac9e41..bec0c91e2d 100644 --- a/hw/i2c/i2c-ddc.c +++ b/hw/i2c/i2c-ddc.c @@ -259,12 +259,12 @@ static int i2c_ddc_tx(I2CSlave *i2c, uint8_t data) s->reg = data; s->firstbyte = false; DPRINTF("[EDID] Written new pointer: %u\n", data); - return 1; + return 0; } /* Ignore all writes */ s->reg++; - return 1; + return 0; } static void i2c_ddc_init(Object *obj) |