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authorBernhard Beschow <shentey@gmail.com>2025-05-07 14:40:40 +0200
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2025-05-08 14:26:37 +0200
commit54e54e594bc8273d210f7ff4448c165a989cbbe8 (patch)
tree1eb8919cbb1b0a0cac1239937355518727b24f35 /hw/i2c/imx_i2c.c
parent35cb01fce6ea8aade77cbc3d7d77c83321bbaf9b (diff)
downloadfocaccia-qemu-54e54e594bc8273d210f7ff4448c165a989cbbe8.tar.gz
focaccia-qemu-54e54e594bc8273d210f7ff4448c165a989cbbe8.zip
hw/i2c/imx: Always set interrupt status bit if interrupt condition occurs
According to the i.MX 8M Plus reference manual, the status flag
I2C_I2SR[IIF] continues to be set when an interrupt condition
occurs even when I2C interrupts are disabled (I2C_I2CR[IIEN] is
clear). However, the device model only sets the flag when I2C
interrupts are enabled which causes U-Boot to loop forever. Fix
the device model by always setting the flag and let I2C_I2CR[IIEN]
guard I2C interrupts only.

Also remove the comment in the code since it merely stated the
obvious and would be outdated now.

Cc: qemu-stable@nongnu.org
Fixes: 20d0f9cf6a41 ("i.MX: Add I2C controller emulator")
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Acked-by: Corey Minyard <cminyard@mvista.com>
Message-ID: <20250507124040.425773-1-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Diffstat (limited to 'hw/i2c/imx_i2c.c')
-rw-r--r--hw/i2c/imx_i2c.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/hw/i2c/imx_i2c.c b/hw/i2c/imx_i2c.c
index 91f84c2ad7..d26177c85d 100644
--- a/hw/i2c/imx_i2c.c
+++ b/hw/i2c/imx_i2c.c
@@ -79,13 +79,12 @@ static void imx_i2c_reset(DeviceState *dev)
 
 static inline void imx_i2c_raise_interrupt(IMXI2CState *s)
 {
-    /*
-     * raise an interrupt if the device is enabled and it is configured
-     * to generate some interrupts.
-     */
-    if (imx_i2c_is_enabled(s) && imx_i2c_interrupt_is_enabled(s)) {
+    if (imx_i2c_is_enabled(s)) {
         s->i2sr |= I2SR_IIF;
-        qemu_irq_raise(s->irq);
+
+        if (imx_i2c_interrupt_is_enabled(s)) {
+            qemu_irq_raise(s->irq);
+        }
     }
 }