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authorJamin Lin <jamin_lin@aspeedtech.com>2024-09-03 16:35:22 +0800
committerCédric Le Goater <clg@redhat.com>2024-09-16 17:44:08 +0200
commit1809ab6a67359e0876981cd05d2a50b2843eabad (patch)
tree665b22de5a74854deee1a79b769184c446aa48ee /hw/i2c/omap_i2c.c
parentc400c38854017eeccda63115814eba4c3ef2b51f (diff)
downloadfocaccia-qemu-1809ab6a67359e0876981cd05d2a50b2843eabad.tar.gz
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hw/i2c/aspeed: Add AST2700 support
Introduce a new ast2700 class to support AST2700.
The I2C bus register memory regions and
I2C bus pool buffer memory regions are discontinuous
and they do not back compatible AST2600.

Add a new ast2700 i2c class init function to match the
address of I2C bus register and pool buffer from the datasheet.

An I2C controller registers owns 8KB address space.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
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