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authorMax Filippov <jcmvbkbc@gmail.com>2020-07-04 18:57:12 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2020-08-21 12:48:16 -0700
commitadbb3df08e8cef46d8a9a77eab097125efeb1968 (patch)
tree4df832c199481d12dbb584cf6c16814009b241ee /hw/i2c/omap_i2c.c
parent7f4faa2185f7ef3fbbee564d1c89edb229c421a3 (diff)
downloadfocaccia-qemu-adbb3df08e8cef46d8a9a77eab097125efeb1968.tar.gz
focaccia-qemu-adbb3df08e8cef46d8a9a77eab097125efeb1968.zip
tests/tcg/xtensa: update test_lsc for DFPU
DFPU doesn't have pre-increment FP load/store opcodes, it has
post-increment opcodes instead. Test increment opcodes present in the
current config.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'hw/i2c/omap_i2c.c')
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