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| author | Aurelien Jarno <aurelien@aurel32.net> | 2013-09-03 08:27:38 +0200 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2014-02-17 10:12:28 -0600 |
| commit | e46b225a3137e62c975c49aaae7bb5f9583cc428 (patch) | |
| tree | aba700db46bf9759e561945e7b4b753c27db4e80 /hw/i2c/omap_i2c.c | |
| parent | 7a3a00979d9dfe2aaa66ce5fc68cd161b4f900ba (diff) | |
| download | focaccia-qemu-e46b225a3137e62c975c49aaae7bb5f9583cc428.tar.gz focaccia-qemu-e46b225a3137e62c975c49aaae7bb5f9583cc428.zip | |
tcg/optimize: fix known-zero bits for right shift ops
32-bit versions of sar and shr ops should not propagate known-zero bits from the unused 32 high bits. For sar it could even lead to wrong code being generated. Cc: qemu-stable@nongnu.org Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'hw/i2c/omap_i2c.c')
0 files changed, 0 insertions, 0 deletions