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authorPeter Maydell <peter.maydell@linaro.org>2016-06-06 16:59:28 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-06-06 16:59:28 +0100
commit78f1edb19fe11fa0c5d0bf484db59a384f455d3c (patch)
tree297a7053371c0396551fa95caa89370ab39f34a1 /hw/i2c/pm_smbus.c
parent04ce861ea545477425ad9e045eec3f61c8a27df9 (diff)
downloadfocaccia-qemu-78f1edb19fe11fa0c5d0bf484db59a384f455d3c.tar.gz
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target-arm: Don't try to set ESR IL bit in arm_cpu_do_interrupt_aarch64()
Remove some incorrect code from arm_cpu_do_interrupt_aarch64()
which attempts to set the IL bit in the syndrome register based
on the value of env->thumb. This is wrong in several ways:
 * IL doesn't indicate Thumb-vs-ARM, it indicates instruction
   length (which may be 16 or 32 for Thumb and is always 32 for ARM)
 * not every syndrome format uses IL like this -- for some IL is
   always set, and for some it is always clear
 * the code is changing esr_el[new_el] even for interrupt entry,
   which is not supposed to modify ESR_ELx at all

Delete the code, and instead rely on the syndrome value in
env->exception.syndrome having already been set up with the
correct value of IL.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1463487258-27468-3-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'hw/i2c/pm_smbus.c')
0 files changed, 0 insertions, 0 deletions