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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-09-12 19:14:04 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-09-21 16:31:09 +0100 |
| commit | 3f1e0eb7c38c19bd2a4bfa8398921d29a1080249 (patch) | |
| tree | efe8fdcdd6aa3a1f12fe8a7b884dd9b1e60fc206 /hw/i2c | |
| parent | 5d4791991d4de12e83d44738417c9e964167b6e8 (diff) | |
| download | focaccia-qemu-3f1e0eb7c38c19bd2a4bfa8398921d29a1080249.tar.gz focaccia-qemu-3f1e0eb7c38c19bd2a4bfa8398921d29a1080249.zip | |
nvic: Make ICSR banked for v8M
The ICSR NVIC register is banked for v8M. This doesn't require any new state, but it does mean that some bits are controlled by BFHNFNMINS and some bits must work with the correct banked exception. There is also a new in v8M PENDNMICLR bit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-18-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'hw/i2c')
0 files changed, 0 insertions, 0 deletions