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authorBin Meng <bin.meng@windriver.com>2021-01-26 14:00:03 +0800
committerAlistair Francis <alistair.francis@wdc.com>2021-03-04 09:43:29 -0500
commit722f1352b6c248ead94efd77ff5726aa0cba949b (patch)
tree5b66ed3f4a7400037ebd9bcfb19f453867c95776 /hw/i2c
parent145b299139da92fb1b1048b393865bc96597d6b9 (diff)
downloadfocaccia-qemu-722f1352b6c248ead94efd77ff5726aa0cba949b.tar.gz
focaccia-qemu-722f1352b6c248ead94efd77ff5726aa0cba949b.zip
hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card
This adds the QSPI2 controller to the SoC, and connects an SD
card to it. The generation of corresponding device tree source
fragment is also added.

Specify machine property `msel` to 11 to boot the same upstream
U-Boot SPL and payload image for the SiFive HiFive Unleashed board.
Note subsequent payload is stored in the SD card image.

$ qemu-system-riscv64 -nographic -M sifive_u,msel=11 -smp 5 -m 8G \
    -bios u-boot-spl.bin -drive file=sdcard.img,if=sd

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210126060007.12904-6-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/i2c')
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