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| author | Clément Mathieu--Drif <clement.mathieu--drif@eviden.com> | 2024-12-12 16:37:46 +0800 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2025-01-15 13:06:17 -0500 |
| commit | 65c4f0999991f6321d6a369fa56c81c57c5b87ad (patch) | |
| tree | 014c96e0a7b32374c5e30b0ce9b7ac085f880441 /hw/i386/intel_iommu_internal.h | |
| parent | fed51ee5e02d8779ccbdce555e556c4ada321281 (diff) | |
| download | focaccia-qemu-65c4f0999991f6321d6a369fa56c81c57c5b87ad.tar.gz focaccia-qemu-65c4f0999991f6321d6a369fa56c81c57c5b87ad.zip | |
intel_iommu: Set accessed and dirty bits during stage-1 translation
Signed-off-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Reviewed-by: Yi Liu <yi.l.liu@intel.com> Acked-by: Jason Wang <jasowang@redhat.com> Message-Id: <20241212083757.605022-10-zhenzhong.duan@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/i386/intel_iommu_internal.h')
| -rw-r--r-- | hw/i386/intel_iommu_internal.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index 3e7365dfff..22dd3faf0c 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -332,6 +332,7 @@ typedef enum VTDFaultReason { /* Output address in the interrupt address range for scalable mode */ VTD_FR_SM_INTERRUPT_ADDR = 0x87, + VTD_FR_FS_BIT_UPDATE_FAILED = 0x91, /* SFS.10 */ VTD_FR_MAX, /* Guard */ } VTDFaultReason; @@ -564,6 +565,8 @@ typedef struct VTDRootEntry VTDRootEntry; #define VTD_FL_P 1ULL #define VTD_FL_RW (1ULL << 1) #define VTD_FL_US (1ULL << 2) +#define VTD_FL_A (1ULL << 5) +#define VTD_FL_D (1ULL << 6) /* Second Level Page Translation Pointer*/ #define VTD_SM_PASID_ENTRY_SLPTPTR (~0xfffULL) |