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| author | Zhenzhong Duan <zhenzhong.duan@intel.com> | 2024-12-12 16:37:40 +0800 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2025-01-15 13:05:58 -0500 |
| commit | 791346f93d2aa3b7eaebf4a12f4b7c558e94ff6b (patch) | |
| tree | d8f3436079cb143641f52114f6f702a564eeded2 /hw/i386/intel_iommu_internal.h | |
| parent | b291dae33d1dab48670b86807a71cb1cbadf39aa (diff) | |
| download | focaccia-qemu-791346f93d2aa3b7eaebf4a12f4b7c558e94ff6b.tar.gz focaccia-qemu-791346f93d2aa3b7eaebf4a12f4b7c558e94ff6b.zip | |
intel_iommu: Add a placeholder variable for scalable mode stage-1 translation
Add an new element flts in IntelIOMMUState to mark stage-1 translation support in scalable mode, this element will be exposed as an intel_iommu property x-flts finally. For now, it's only a placehholder and used for address width compatibility check and block host device passthrough until nesting is supported. Signed-off-by: Yi Liu <yi.l.liu@intel.com> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Acked-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com> Reviewed-by: Yi Liu <yi.l.liu@intel.com> Message-Id: <20241212083757.605022-4-zhenzhong.duan@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/i386/intel_iommu_internal.h')
0 files changed, 0 insertions, 0 deletions