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authorPhilippe Mathieu-Daudé <philmd@redhat.com>2019-10-15 14:05:42 +0200
committerPhilippe Mathieu-Daudé <philmd@redhat.com>2019-11-05 23:33:12 +0100
commit4b19de14b145ac1df3082f625e3b8f9dcb0e1918 (patch)
tree5d689de0bc7383e0b03da4b0bd5d04c7921a12d0 /hw/i386/xen
parent0063454affb3c5a595539a3cad9e20e7229d8fac (diff)
downloadfocaccia-qemu-4b19de14b145ac1df3082f625e3b8f9dcb0e1918.tar.gz
focaccia-qemu-4b19de14b145ac1df3082f625e3b8f9dcb0e1918.zip
hw/pci-host/piix: Define and use the PIIX IRQ Route Control Registers
The IRQ Route Control registers definitions belong to the PIIX
chipset. We were only defining the 'A' register. Define the other
B, C and D registers, and use them.

Acked-by: Paul Durrant <paul@xen.org>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Diffstat (limited to 'hw/i386/xen')
-rw-r--r--hw/i386/xen/xen-hvm.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c
index 95f23a263c..82ece6b9e7 100644
--- a/hw/i386/xen/xen-hvm.c
+++ b/hw/i386/xen/xen-hvm.c
@@ -14,6 +14,7 @@
 #include "hw/pci/pci.h"
 #include "hw/pci/pci_host.h"
 #include "hw/i386/pc.h"
+#include "hw/southbridge/piix.h"
 #include "hw/irq.h"
 #include "hw/hw.h"
 #include "hw/i386/apic-msidef.h"
@@ -156,8 +157,8 @@ void xen_piix_pci_write_config_client(uint32_t address, uint32_t val, int len)
             v = 0;
         }
         v &= 0xf;
-        if (((address + i) >= 0x60) && ((address + i) <= 0x63)) {
-            xen_set_pci_link_route(xen_domid, address + i - 0x60, v);
+        if (((address + i) >= PIIX_PIRQCA) && ((address + i) <= PIIX_PIRQCD)) {
+            xen_set_pci_link_route(xen_domid, address + i - PIIX_PIRQCA, v);
         }
     }
 }