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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-03-28 00:27:04 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-03-28 00:27:04 +0000 |
| commit | 5acad5bf480321f178866dc28e38eeda5a3f19bb (patch) | |
| tree | ac1e2a40a98c53796e1edc5544580f3a135c3fef /hw/ide/sii3112.c | |
| parent | 127fe8643340c330cbc0a4194ea56e3d522dbb71 (diff) | |
| parent | cbf4c9ac9c000f7caf1bfee031041b62d2b000c8 (diff) | |
| download | focaccia-qemu-5acad5bf480321f178866dc28e38eeda5a3f19bb.tar.gz focaccia-qemu-5acad5bf480321f178866dc28e38eeda5a3f19bb.zip | |
Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into staging
Pull request # gpg: Signature made Fri 27 Mar 2020 20:14:10 GMT # gpg: using RSA key F9B7ABDBBCACDF95BE76CBD07DEF8106AAFC390E # gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" [full] # Primary key fingerprint: FAEB 9711 A12C F475 812F 18F2 88A9 064D 1835 61EB # Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76 CBD0 7DEF 8106 AAFC 390E * remotes/jnsnow/tags/ide-pull-request: cmd646-ide: use qdev gpio rather than qemu_allocate_irqs() via-ide: use qdev gpio rather than qemu_allocate_irqs() via-ide: don't use PCI level for legacy IRQs hw/ide/sii3112: Use qdev gpio rather than qemu_allocate_irqs() fdc/i8257: implement verify transfer mode Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ide/sii3112.c')
| -rw-r--r-- | hw/ide/sii3112.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c index 06605d7af2..d69079c3d9 100644 --- a/hw/ide/sii3112.c +++ b/hw/ide/sii3112.c @@ -251,8 +251,8 @@ static void sii3112_pci_realize(PCIDevice *dev, Error **errp) { SiI3112PCIState *d = SII3112_PCI(dev); PCIIDEState *s = PCI_IDE(dev); + DeviceState *ds = DEVICE(dev); MemoryRegion *mr; - qemu_irq *irq; int i; pci_config_set_interrupt_pin(dev->config, 1); @@ -280,10 +280,10 @@ static void sii3112_pci_realize(PCIDevice *dev, Error **errp) memory_region_init_alias(mr, OBJECT(d), "sii3112.bar4", &d->mmio, 0, 16); pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, mr); - irq = qemu_allocate_irqs(sii3112_set_irq, d, 2); + qdev_init_gpio_in(ds, sii3112_set_irq, 2); for (i = 0; i < 2; i++) { - ide_bus_new(&s->bus[i], sizeof(s->bus[i]), DEVICE(dev), i, 1); - ide_init2(&s->bus[i], irq[i]); + ide_bus_new(&s->bus[i], sizeof(s->bus[i]), ds, i, 1); + ide_init2(&s->bus[i], qdev_get_gpio_in(ds, i)); bmdma_init(&s->bus[i], &s->bmdma[i], s); s->bmdma[i].bus = &s->bus[i]; |