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| author | Anton Blanchard <anton@samba.org> | 2013-06-11 21:19:35 +1000 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2013-06-17 10:41:52 -0700 |
| commit | 8a94cfb05ea9a8991c832236b4174d354025a7b7 (patch) | |
| tree | 2d0a4602dbb5c02e55a21baa937d6152a8c11d41 /hw/intc/apic.c | |
| parent | 38aea177d93556aada7c4c7aa530f0050715e293 (diff) | |
| download | focaccia-qemu-8a94cfb05ea9a8991c832236b4174d354025a7b7.tar.gz focaccia-qemu-8a94cfb05ea9a8991c832236b4174d354025a7b7.zip | |
tcg-ppc64: Fix RLDCL opcode
The rldcl instruction doesn't have an sh field, so the minor opcode is shifted 1 bit. We were using the XO30 macro which shifted the minor opcode 2 bits. Remove XO30 and add MD30 and MDS30 macros which match the Power ISA categories. Cc: qemu-stable@nongnu.org Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'hw/intc/apic.c')
0 files changed, 0 insertions, 0 deletions